EMC at PCB Level: Potential Sources, Compliance, and Layout Techniques – PAN-EUROPEAN TRAINING, RESEARCH AND EDUCATION NETWORK ON ELECTROMAGNETIC RISK MANAGEMENT
A Plague Of Parasites
A Complete Guide For PCB 2.4G Antenna Design | C&T RF Antennas Inc | Antenna Manufacturer
SI/PI degradation due to package-common-mode resonance caused by parasitic capacitance between package and PCB | Semantic Scholar
How to Reduce Parasitic Capacitance in Your PCB Layout - YouTube
Reducing Parasitic Capacitance in PCB Layout | Sierra Circuits
How to Reduce Parasitic Capacitance in a PCB Layout | Zach Peterson | Blog | PCB Layout
Parasitic capacitance, inductance, and displacement current - Power Electronic Tips
Reducing Parasitic Capacitance in PCB Layout | Sierra Circuits